There is a technique of manufacturing a semiconductor device by forming a redistribution wiring after forming a bonding pad.
Japanese Patent Application Laid-Open Publication No. 2003-264256 (Patent Document 1) describes a technique relating to a semiconductor device in which a Cu wiring 10 is formed after a bonding pad BP is formed. Japanese Patent Application Laid-Open Publication No. 2000-183214 (Patent Document 2) and Japanese Patent Application Laid-Open Publication No. H6-53211 (Patent Document 3) describe a technique for providing a slit in a wiring layer.